Learn More About CVC

1.  Quick Start Guide

Not ready to download OSS CVC?  It is best to download CVC because the release directory has extensive documentation and examples.   Click to download the CVC quick start guide.


2. Blog Post Criticising OVM/UVM Methodology

OSS CVC does not support system Verilog verification features because it follows the IEEE 2005 standard and remains a Pascal like  language.  Current commercial CVC users verify by comparing to reference program models through the PLI (sometimes dpi_ and sometimes vpi_).  This interesting Blog post claims UVM is over engineered and requires thosands of lines for tasks that should require tens of lines.  If you have any suggestions for Verilog centric verification features, please contact us.

Time to Blow Up UVM

3.  Semiwiki Customer CVC Speed Evaluation

Also, it is best to download OSS CVC and run the included open core models to evaluate CVC speed.   However, you can download an evaluation of CVC performance by an CVC RTL only user published by the Semiwiki site.

Semiwiki CVC evaluation

4.  Scientific Paper Describing  Compiler Internals

If you are interested in the compiler development innovations in CVC, you can read this scientific paper.   It uses a method derived from Karl Popper’s falsifiability that is currently not accepted by academics.   Paper  describes CVC compiler design methodology, general organization and Verilog machine code generation innovations.


5.  Importance of Using Multiple Simulators

One common question is why use OSS CVC.  The answer is that large HDL models often have suble timing problems such as races and glitches which can effect circuit function especially if a large number of ICs are fabbed. OSS CVC intensionally uses a different event queue ordering algorithm still compliant with 1364 standard.  You can see discussions of this by searching for “Using gpl cver to detect races and glitches.”  Gpl Cver is predecessor to CVC.  Here is an example discussion: